8051 comes with 3 number of timers. All 3 timers can be configured individually. A timer in most of the controllers has the following 3 functionalities.
One of the most important use of Timers is to generate delays that are very precise.
Most of the 8051 family microcontrollers completes one machine cycle using 12 cpu cycles.
Meaning to say most of the instructions takes total of 12 clock pulses for their execution.
we are using master clock of 11.30592 MHz that means , time period for 1 machine cycle is 1.085uSec. How???
Fcpu=11.0592MHz
12 Cycles required for one machine cycle
Finstruction=(11.0592/12) MHz => 921.6 KHz
Time period of each machine cycle = 1/921.6 msec.
so... Tmachine cycle = 1.085 uSec
It needs 1.085 usec to execute one instruction.
Timer counts up by one in 1.085 uSec
so that Desired delay = No of counts x 1.085 usec
All we need to know is No of counts required to generate a particular amount of delay.
For example we need to generate a delay of 20 mSec. For that first we need to calculate amount of timer counts required to pass 20 msec.
Timer counts required = 20000 / 1.085 => 18433 counts
Now lets see how to implement this whole delay generation logic in a 'C' program.
First we need to know the various registers needed to control timer operations. 8051 derivative has total of 2, 16 - bit timers. while 8051 has 3 timers. But we are going to discuss 8051 only.
In addition, each timer also has two SFR dedicated to its own operation only.
TH0,TL0 for Timer0 and TH1,TL1 for Timer1.
They are,
- Calculating time between the events
- Generating baud rates in serial communication
- Counting the events(Counter)
One of the most important use of Timers is to generate delays that are very precise.
Most of the 8051 family microcontrollers completes one machine cycle using 12 cpu cycles.
Meaning to say most of the instructions takes total of 12 clock pulses for their execution.
we are using master clock of 11.30592 MHz that means , time period for 1 machine cycle is 1.085uSec. How???
Fcpu=11.0592MHz
12 Cycles required for one machine cycle
Finstruction=(11.0592/12) MHz => 921.6 KHz
Time period of each machine cycle = 1/921.6 msec.
so... Tmachine cycle = 1.085 uSec
It needs 1.085 usec to execute one instruction.
Timer counts up by one in 1.085 uSec
so that Desired delay = No of counts x 1.085 usec
All we need to know is No of counts required to generate a particular amount of delay.
For example we need to generate a delay of 20 mSec. For that first we need to calculate amount of timer counts required to pass 20 msec.
Timer counts required = 20000 / 1.085 => 18433 counts
Now lets see how to implement this whole delay generation logic in a 'C' program.
First we need to know the various registers needed to control timer operations. 8051 derivative has total of 2, 16 - bit timers. while 8051 has 3 timers. But we are going to discuss 8051 only.
Timer SFR's
Both Timer0 and Timer1 shares two common SFR's known as TMOD and TCON which controls timer operation.In addition, each timer also has two SFR dedicated to its own operation only.
TH0,TL0 for Timer0 and TH1,TL1 for Timer1.
| SFR name | Description | SFR address | Bit addressable |
| TH0 | Timer0 High Byte | 0x8C | No |
| TL0 | Timer0 Low Byte | 0x8A | No |
| TH1 | Timer1 High Byte | 0x8D | No |
| TL1 | Timer1 Low Byte | 0x8B | No |
| TCON | Timer Control Register | 0x88 | Yes |
| TMOD | Timer Mode Control | 0x89 | No |
Lets first talk about our first control SFR: TMOD (Timer Mode). The TMOD SFR is used to control the mode of operation of both timers. Each bit of the SFR gives the microcontroller specific information concerning how to run a timer. The high four bits (bits 4 through 7) relate to Timer 1 whereas the low four bits (bits 0 through 3) perform the exact same functions, but for timer 0.
While Timer 0 is in split mode, the real Timer 1 (i.e. TH1 and TL1) can be put into modes 0, 1 or 2 normally--however, you may not start or stop the real timer 1 since the bits that do that are now linked to TH0. The real timer 1, in this case, will be incremented every machine cycle no matter what.
The only real use I can see of using split timer mode is if you need to have two separate timers and, additionally, a baud rate generator. In such case you can use the real Timer 1 as a baud rate generator and use TH0/TL0 as two separate timers.
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The individual bits of TMOD have the following functions:
13 Bit Timer Mode
When the timer is in 13-bit mode, TLx will count from 0 to 31. When TLx is incremented from 31, it will "reset" to 0 and increment THx. Thus, effectively, only 13 bits of the two timer bytes are being used: bits 0-4 of TLx and bits 0-7 of THx. This also means, in essence, the timer can only contain 8192 values. If you set a 13-bit timer to 0, it will overflow back to zero 8192 instruction cycles later.16 Bit Timer Mode
Timer mode "1" is a 16-bit timer. This is a very commonly used mode. It functions just like 13-bit mode except that all 16 bits are used. TLx is incremented from 0 to 255. When TLx is incremented from 255, it resets to 0 and causes THx to be incremented by 1. Since this is a full 16-bit timer, the timer may contain up to 65536 distinct values. If you set a 16-bit timer to 0, it will overflow back to 0 after 65,536 machine cycles.8 Bit Timer Mode
Timer mode "2" is an 8-bit auto-reload mode. What is that, you may ask? Simple. When a timer is in mode 2, THx holds the "reload value" and TLx is the timer itself. TLx starts counting up. When TLx reaches 255 and is subsequently incremented instead of resetting to 0 (as in the case of modes 0 and 1) it will be reset to the value stored in THx.Split Timer Mode
Timer mode "3" is a split-timer mode. When Timer 0 is placed in mode 3, it essentially becomes two separate 8-bit timers. That is to say, Timer 0 is TL0 and Timer 1 is TH0. Both timers count from 0 to 255 and overflow back to 0. All the bits that are related to Timer 1 will now be tied to TH0 and all the bits related to Timer 0 will be tied to TL0.While Timer 0 is in split mode, the real Timer 1 (i.e. TH1 and TL1) can be put into modes 0, 1 or 2 normally--however, you may not start or stop the real timer 1 since the bits that do that are now linked to TH0. The real timer 1, in this case, will be incremented every machine cycle no matter what.
The only real use I can see of using split timer mode is if you need to have two separate timers and, additionally, a baud rate generator. In such case you can use the real Timer 1 as a baud rate generator and use TH0/TL0 as two separate timers.
Cheers!!!!
-> Let us Embed <-